000 -LEADER |
fixed length control field |
03239nam a2200409 a 4500 |
001 - CONTROL NUMBER |
control field |
vtls003238552 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
MY-SjTCS |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20200226115417.0 |
006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS |
fixed length control field |
m u |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION |
fixed length control field |
cr cn||||||||| |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
120829s2011 si af sb 001 0 eng d |
010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
Canceled/invalid LC control number |
2011-002991 |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
Canceled/invalid ISBN |
9780470828519 (e-book) |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
Canceled/invalid ISBN |
9780470828526 (ePub) |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
Canceled/invalid ISBN |
9781118073315 (Mobi) |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
Canceled/invalid ISBN |
9780470828496 |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
Canceled/invalid ISBN |
9780470828502 (e-book) |
035 ## - SYSTEM CONTROL NUMBER |
System control number |
(OCoLC)747411912 |
035 ## - SYSTEM CONTROL NUMBER |
System control number |
(CaPaEBR)ebr10483240 |
039 #9 - LEVEL OF BIBLIOGRAPHIC CONTROL AND CODING DETAIL [OBSOLETE] |
-- |
201208291107 |
-- |
wilmina |
040 ## - CATALOGING SOURCE |
Original cataloging agency |
CaPaEBR |
Transcribing agency |
CaPaEBR |
050 14 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7895.E42 |
Item number |
B3264 2011eb |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.39/9 |
Edition number |
22 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Bailey, Donald G. |
Fuller form of name |
(Donald Graeme), |
Dates associated with a name |
1962- |
245 10 - TITLE STATEMENT |
Title |
Design for embedded image processing on FPGAs |
Medium |
[electronic resource] / |
Statement of responsibility, etc. |
Donald G. Bailey. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. |
Place of publication, distribution, etc. |
Singapore ; |
-- |
New York, N.Y. : |
Name of publisher, distributor, etc. |
Wiley, |
Date of publication, distribution, etc. |
2011. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
xvi, 482 p., [6] p. of plates : |
Other physical details |
ill. (some col.) |
504 ## - BIBLIOGRAPHY, ETC. NOTE |
Bibliography, etc. note |
Includes bibliographical references and index. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
"Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage will be given of a range of image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques will be illustrated with several example applications or case studies from projects or applications I have been involves with. Issues such as interfacing between the FPGA and peripheral devices will be covered briefly, as will designing the system in such a way that it can be more readily debugged and tuned"-- |
Assigning source |
Provided by publisher. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
"The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation"-- |
Assigning source |
Provided by publisher. |
533 ## - REPRODUCTION NOTE |
Type of reproduction |
Electronic reproduction. |
Place of reproduction |
Palo Alto, Calif. : |
Agency responsible for reproduction |
ebrary, |
Date of reproduction |
2011. |
Note about reproduction |
Available via World Wide Web. |
-- |
Access may be limited to ebrary affiliated libraries. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Embedded computer systems. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Field programmable gate arrays. |
655 #7 - INDEX TERM--GENRE/FORM |
Genre/form data or focus term |
Electronic books. |
Source of term |
local |
710 2# - ADDED ENTRY--CORPORATE NAME |
Corporate name or jurisdiction name as entry element |
ebrary, Inc. |
9 (RLIN) |
25628 |
856 40 - ELECTRONIC LOCATION AND ACCESS |
Uniform Resource Identifier |
http://ezproxy.taylors.edu.my/login?url=http://site.ebrary.com/lib/taylorscollege/Doc?id=10483240 |
Public note |
An electronic book accessible through the World Wide Web; click to view |
999 ## - SYSTEM CONTROL NUMBERS (KOHA) |
Koha biblionumber |
148082 |
Koha biblioitemnumber |
148082 |