| 000 | 01638nam a2200409 a 4500 | ||
|---|---|---|---|
| 001 | vtls003196341 | ||
| 003 | MY-SjTCS | ||
| 005 | 20200306165557.0 | ||
| 006 | m u | ||
| 007 | cr cn||||||||| | ||
| 008 | 100712s2008 enka sb 001 0 eng | ||
| 010 | _z 2007-043838 | ||
| 015 |
_aGBA804994 _2bnb |
||
| 016 | 7 |
_z014488216 _2Uk |
|
| 020 | _z9780470060704 | ||
| 020 | _z0470060700 | ||
| 035 | _a(CaPaEBR)ebr10301213 | ||
| 039 | 9 |
_y201007121705 _zVLOAD |
|
| 040 |
_aCaPaEBR _cCaPaEBR |
||
| 050 | 1 | 4 |
_aTK7885.7 _b.M54 2008eb |
| 082 | 0 | 4 |
_a004/.33 _222 |
| 100 | 1 |
_aMinns, Peter D. _9269186 |
|
| 245 | 1 | 0 |
_aFSM-based digital design using Verilog HDL _h[electronic resource] / _cPeter Minns, Ian Elliott. |
| 246 | 3 | _aFinite state machine based digital design using Verilog HDL | |
| 260 |
_aChichester, England ; _aHoboken, NJ : _bJ. Wiley, _cc2008. |
||
| 300 |
_axiii, 391 p. : _bill. ; _c26 cm. + |
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| 504 | _aIncludes bibliographical references and index. | ||
| 529 | _aTSLHHL | ||
| 533 |
_aElectronic reproduction. _bPalo Alto, Calif. : _cebrary, _d2009. _nAvailable via World Wide Web. _nAccess may be limited to ebrary affiliated libraries. |
||
| 650 | 0 |
_aVerilog (Computer hardware description language) _918798 |
|
| 650 | 0 |
_aDigital electronics. _9210386 |
|
| 650 | 0 |
_aSequential machine theory. _96885 |
|
| 655 | 7 |
_aElectronic books. _2local _9201578 |
|
| 700 | 1 |
_aElliott, Ian D. _9269187 |
|
| 710 | 2 |
_aebrary, Inc. _925628 |
|
| 856 | 4 | 0 |
_uhttp://ezproxy.taylors.edu.my/login?url=http://site.ebrary.com/lib/taylorscollege/Doc?id=10301213 _zAn electronic book accessible through the World Wide Web; click to view |
| 999 |
_c56009 _d56009 |
||