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007 cr cn|||||||||
008 120815s2007 ne a sb 001 0 eng
010 _z2006-103541
015 _aGBA707930
_2bnb
016 7 _z013655410
_2Uk
020 _z9780123735515 (hc)
020 _z0123735513 (hc)
035 _a(OCoLC)648304037
035 _a(CaPaEBR)ebr10186468
039 9 _y201208151702
_zwilmina
040 _aCaPaEBR
_cCaPaEBR
050 1 4 _aTK7895.E42
_bB326 2007eb
082 0 4 _a621.3815
_222
100 1 _aBailey, Brian,
_d1959-
245 1 0 _aESL design and verification
_h[electronic resource] :
_ba prescription for electronic system-level methodology /
_cBrian Bailey, Grant Martin, Andrew Piziali.
246 3 _aElectronic system-level design
260 _aAmsterdam ;
_aBoston :
_bMorgan Kaufmann,
_cc2007.
300 _axxv, 462 p. :
_bill. ;
_c24 cm.
490 1 _aThe Morgan Kaufmann series in systems on silicon
504 _aIncludes bibliographical references and index.
533 _aElectronic reproduction.
_bPalo Alto, Calif. :
_cebrary,
_d2009.
_nAvailable via World Wide Web.
_nAccess may be limited to ebrary affiliated libraries.
650 0 _aSystems on a chip
_xDesign and construction.
655 7 _aElectronic books.
_2local
700 1 _aMartin, Grant
_q(Grant Edmund)
700 1 _aPiziali, Andrew.
710 2 _aebrary, Inc.
_925628
830 0 _aMorgan Kaufmann series in systems on silicon.
_949208
856 4 0 _uhttp://ezproxy.taylors.edu.my/login?url=http://site.ebrary.com/lib/taylorscollege/Doc?id=10186468
_zAn electronic book accessible through the World Wide Web; click to view
999 _c84639
_d84639